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Semiconductor Analysis
Thermal Fault Isolation
Lock in thermography (LIT) for accurately locating thermal failures in semiconductor device design.
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Semiconductor devices can fail for many reasons, leading to wasted time and increased costs for the manufacturer. Failures can result from excess current or voltage, ionizing radiation, mechanical stress, or large increases in temperature, which are the consequence of an uneven distribution of local power dissipation.
Steady-state and lock-in thermography are techniques that allow you to detect the temperature variations that lead to device failures. Of these methods, lock-in infrared (IR) thermography (LIT) offers much better signal-to-noise ratio, sensitivity, and feature resolution than steady-state thermography. LIT can be used in the failure analysis of semiconductor interconnects to locate line shorts, electrostatic discharge (ESD) defects, oxide damage, defective transistors and diodes, and device latch-ups.
LIT is an increasingly valuable technique for locating thermal faults in a broad range of semiconductor devices. The Thermo Scientific ELITE System is a powerful LIT tool that is particularly useful when combined with the Thermo Scientific Helios PFIB DualBeam for physical analysis, creating a highly efficient workflow. Learn more by exploring the product pages below.
Thermal image produced during ohmic short detection, showing wires soldered to a device.
Lock in thermography workflow example
Thermal images produced by the ELITE System, showing the power of lock-in technology for scaling acquisition time based on signal strength.
Real-time lock-in-thermography scheme.
ELITE image showing a very weak thermal emitter captured after 80 hours of integration.
The ability to locate a thermal source in three dimensions makes the ELITE System well-suited for stacked-die analysis.
Thermal images produced by the ELITE System, showing the power of lock-in technology for scaling acquisition time based on signal strength.
Real-time lock-in-thermography scheme.
ELITE image showing a very weak thermal emitter captured after 80 hours of integration.
The ability to locate a thermal source in three dimensions makes the ELITE System well-suited for stacked-die analysis.
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