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Display Module Failure Analysis
Display research and development, process metrology and failure inspection.
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Displays are an essential part of our daily lives. Over the past decade, mainstream display technology has transitioned from LCD to OLED with new technologies such as quantum dot and micro-LED emerging. Resolution, luminance, form factor, reliability, and quality are driving continuous innovation in display development.
As display technologies advance, research and development, process metrology, and failure analysis challenges increase, requiring fast time-to-data and reliable solutions.
Engineering future generations of advanced display technology
Improving display quality and light conversion efficiency, while continuing to increase yields and reducing production costs is critical.
Mainstream (OLED) technology is striving to deliver a longer display life and new form factors, leading to the continued development of thin-film encapsulation (TFE) technology. The evolution from quantum dot enhancement film (QDEF) to electroluminescent QD LED demands precise characterization and control over the size and shape of the microstructure. For micro-LED, there is a continued desire to improve its external quantum efficiency and reduce leakage current.
These advancements introduce new engineering challenges that necessitate nano-scale analysis, repeatable performance, and high-quality data from S/TEM based analytical workflows.
Semiconductor process metrology for high-quality display device manufacturing
As designers shrink the dimensions of display technology, the need for high accuracy metrology increases. Reducing pixel size improves resolution, reducing the display thickness increases energy conversion. New architectures require the critical dimensions (CD) of the backplane and the light-emitting unit be controlled accurately in both lateral and vertical directions. Tighter design specifications require fast FIB/SEM based metrology with a high degree of automation and repeatability.
Failure analysis of display technology
Display device manufacturing is increasingly complex. Defects due to particles, contamination, or process deviations can impact panel yield and productivity. As pixel size shrinks laterally, and structural complexity increases, traditional optical inspection methods no longer detect all the “killer” defects. With defects occurring in the panel or the fully assembled display module, isolating the defect to a particular depth or vertical layer becomes more challenging. This places a greater premium on solutions and workflows that deliver thin slices through large volume samples with surgical precision and minimal damage while providing high-resolution images to identify defects quickly and confidently.
Thermo Fisher Scientific offers a unique and comprehensive set of workflows to meet the R&D, metrology, and defect characterization needs of the advanced display industry.
Example workflows
1. Display panel failure analysis workflow:
2. Display module assembly failure analysis workflow:
Full-stack, large-area cross-section of a touchscreen from POL to PI.
Fully automated TEM prep of the light-emitting layer.
Blogs
- How to Clear R&D Hurdles in Display Technology Engineering ›
- How to Improve Quality and Yield with Early Failure Analysis of Semiconductor Devices ›
- How Advanced Process Metrology Enables Crucial Layer Examination of Display Technology ›
- Mapping the Evolving World of Information Display Technology ›
Full-stack, large-area cross-section of a touchscreen from POL to PI.
Fully automated TEM prep of the light-emitting layer.
Blogs
- How to Clear R&D Hurdles in Display Technology Engineering ›
- How to Improve Quality and Yield with Early Failure Analysis of Semiconductor Devices ›
- How Advanced Process Metrology Enables Crucial Layer Examination of Display Technology ›
- Mapping the Evolving World of Information Display Technology ›
Semiconductor research and development
Innovation starts with research and development. Learn more about solutions to help you understand innovative structures and materials at the atomic level.
Semiconductor metrology
Manufacturing today’s complex semiconductors requires exact process controls. Learn more about advanced metrology and analysis solutions to accelerate yield learnings.
Semiconductor Failure Analysis
Complex semiconductor device structures result in more places for defects to hide. Learn more about failure analysis solutions to isolate, analyze, and repair defects.
Semiconductor materials characterization
Many factors impact yield, performance, and reliability. Learn more about solutions to characterize physical, structural, and chemical properties.
ESD Semiconductor Qualification
Every electrostatic discharge (ESD) control plan is required to identify devices that are sensitive to ESD. We offer a complete suite of test systems to help with your device qualification requirements.
Thermal Fault Isolation
Uneven distribution of local power dissipation can cause large, localized increases in temperature, leading to device failure. We offer unique solutions for thermal fault isolation with high-sensitivity lock-in infrared thermography (LIT).
Semiconductor Analysis and Imaging
Thermo Fisher Scientific offers scanning electron microscopes for every function of a semiconductor lab, from general imaging tasks to advanced failure analysis techniques requiring precise voltage-contrast measurements.
SEM Metrology
Scanning electron microscopy provides accurate and reliable metrology data at nanometer scales. Automated ultra-high-resolution SEM metrology enables faster time-to-yield and time-to-market for memory, logic, and data storage applications.
Sample Preparation of Semiconductor Devices
Thermo Scientific DualBeam systems provide accurate TEM sample preparation for atomic-scale analysis of semiconductor devices. Automation and advanced machine learning technologies produce high-quality samples, at the correct location, and a low cost per sample.
Semiconductor TEM Imaging and Analysis
Thermo Scientific transmission electron microscopes offer high-resolution imaging and analysis of semiconductor devices, enabling manufacturers to calibrate toolsets, diagnose failure mechanisms, and optimize overall process yields.
Device Delayering
Shrinking feature size, along with advanced design and architecture, results in increasingly challenging failure analysis for semiconductors. Damage-free delayering of devices is a critical technique for the detection of buried electrical faults and failures.
ESD Compliance Testing
Electrostatic discharge (ESD) can damage small features and structures in semiconductors and integrated circuits. We offer a comprehensive suite of test equipment which verifies that your devices meet targeted ESD compliance standards.
Thermal Fault Isolation
Uneven distribution of local power dissipation can cause large, localized increases in temperature, leading to device failure. We offer unique solutions for thermal fault isolation with high-sensitivity lock-in infrared thermography (LIT).
Semiconductor Analysis and Imaging
Thermo Fisher Scientific offers scanning electron microscopes for every function of a semiconductor lab, from general imaging tasks to advanced failure analysis techniques requiring precise voltage-contrast measurements.
SEM Metrology
Scanning electron microscopy provides accurate and reliable metrology data at nanometer scales. Automated ultra-high-resolution SEM metrology enables faster time-to-yield and time-to-market for memory, logic, and data storage applications.
Sample Preparation of Semiconductor Devices
Thermo Scientific DualBeam systems provide accurate TEM sample preparation for atomic-scale analysis of semiconductor devices. Automation and advanced machine learning technologies produce high-quality samples, at the correct location, and a low cost per sample.
Semiconductor TEM Imaging and Analysis
Thermo Scientific transmission electron microscopes offer high-resolution imaging and analysis of semiconductor devices, enabling manufacturers to calibrate toolsets, diagnose failure mechanisms, and optimize overall process yields.
Device Delayering
Shrinking feature size, along with advanced design and architecture, results in increasingly challenging failure analysis for semiconductors. Damage-free delayering of devices is a critical technique for the detection of buried electrical faults and failures.
ESD Compliance Testing
Electrostatic discharge (ESD) can damage small features and structures in semiconductors and integrated circuits. We offer a comprehensive suite of test equipment which verifies that your devices meet targeted ESD compliance standards.
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semiconductors
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