Applications for Failure Analysis and Reliability in Power Semiconductor Devices

Workflows for characterization and failure analysis of power semiconductor devices

Defects and variations in power devices negatively impact performance, yield, and reliability. They can occur in substrates, epitaxial layers, or within the device structure itself. Thermo Fisher Scientific offers industry leading workflows and solutions to successfully analyze features and defects in compound semiconductor devices.

Crystalline defect analysis

Analyzing crystalline defects requires techniques to understand the defect density in the substrate and to characterize crystalline defects in the epitaxial layers. 

Substrate defect density in power semiconductor devices

Transitioning to wide-bandgap materials is significantly improving the performance of power, RF, and other devices traditionally fabricated using Si. However, crystalline defects in these new substrates can affect wafer quality. It’s therefore critical to quantify and classify defects occurring in the substrate growth process to improve wafer yields.

 

By combining electron channeling contrast imaging (ECCI) and Thermo Scientific Maps Software for large-area reconstruction on the Thermo Scientific Apreo 2 SEM, it’s possible to determine the defect density and type which can help speed up the manufacturing process by addressing the root cause.

This non-destructive technique is applicable to bare, blanket, and patterned wafers or wafer pieces.

Characterizing crystalline defects and epitaxial layers

Understanding epitaxial layer profiles and the effects of different faults and dislocations is imperative when maximizing device performance and reliability. This can be accomplished with the Thermo Scientific Helios 5 FX DualBeam FIB-SEM, which combines ECCI, STEM, and SEM capabilities in one tool for a highly efficient workflow enabled by its unique sample handling and detector configuration. Complementary cathodoluminescence (CL) analysis will isolate optically active defects. 

A complete workflow for lattice defect localization and analysis is possible with in-situ ECCI and STEM in the Helios 5 FX DualBeam FIB-SEM.

Buried defect analysis in semiconductor power devices

Demand to increase power density with lightweight, low footprint, high-performance devices has introduced challenges into the manufacturing of power semiconductors. To address these, Thermo Fisher Scientific offers industry leading solutions and workflows to successfully locate and analyze defects, characterize device structures, and ultimately enable improvements to yield, quality, and reliability with this critical information.

 

Sub-surface structures and interfaces can be challenging to analyze, as are defects obstructed by thick layers within a finished device. In such cases, a comprehensive electrical to physical failure analysis workflow provides flexibility and accelerates root cause determination and device characterization.

 

3D fault isolation with lock-in thermography (LIT) can be a critical first step, allowing defect identification even under metalized regions. Coarse LIT localization enables targeted thick metal removal by plasma-FIB and high-resolution OBIRCH isolation, designed for high voltage devices. LIT analysis also supports performance characterization before and after burn-in testing, which can indicate reliability issues for further inspection. Finally, with precise PFIB preparation, the device undergoes thorough physical analysis by SEM or S/TEM. 

 

Complex power devices require a complete electrical to physical failure analysis workflow to precisely locate defects and accurately characterize nanoscale structures.

For Research Use Only. Not for use in diagnostic procedures.