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Advanced logic characterization techniques
Thermo Fisher Scientific specializes in advanced techniques, including sample preparation, fault localization, and imaging and analysis. Discover our innovative solutions to propel your advanced logic device development and manufacturing with confidence.
FIB sample preparation
FIB milling of logic transistors
Focused ion beam milling selectively removes materials to unveil intricate 3D structures for defect and failure analysis in advanced logic devices. Combine cross-sectional FIB milling with SEM imaging and analysis, and you can rapidly pinpoint the root cause of surface/near-surface defects and electrical faults. Exceptionally precise, high-quality FIB milling can be performed on individual dies using the Thermo Scientific Helios 6 HD FIB-SEM or on entire wafers using the Thermo Scientific Helios 5 EXL Wafer DualBeam.
Cross-sectional milling showing transistor structures
TEM sample preparation
Sample preparation is increasingly important in metrology and detect analysis workflows for improving front-end-of-line (FEOL) processes. In situ "inverted" sample prep workflows found in the Helios 5 EXL Wafer DualBeam and the Helios 6 HD FIB-SEM deliver high-quality, ultra-thin TEM samples.
In situ “inverted” TEM sample preparation
Semiconductor device delayering
Delayering systemically removes material layer by layer to provide a consistent and predictable surface for accurate defect detection and characterization. Proprietary gas chemistry provides high-level planarity and uniformity to ensure defects are not obscured or distorted by surface irregularities. Automated end-pointing precisely stops on any target layer within the back-end-of-line (BEOL) interconnect structures. Site-specific delayering capabilities are offered on both the Helios 5 PXL PFIB Wafer DualBeam and the Helios 5 PFIB DualBeam.
Site-specific device delayering using plasma focused ion beam
Semiconductor fault isolation
Electron beam and optical probing
Advanced logic devices demand higher resolution and the capability to investigate structures that are concealed by power distribution networks. The Thermo Scientific Meridian EX System’s electron beam probing (e-beam) with scanning electron microscope (SEM) voltage contrast provides nanometer-scale resolution and the unique ability to probe through complex metal wiring layers on sub-5 nm nodes. This powerful technique enables detailed analysis and characterization of the internal structures of these devices, allowing for a deeper understanding of their performance and functionality compared to traditional optical probing techniques.
The Meridian EX System generates highlight gates operating at a specific frequency
Thermal fault isolation
Thermal fault isolation is used in semiconductor failure analysis to identify and locate defects or faults within a device by measuring temperature variations. Utilizing high-sensitivity thermal optics found in the Thermo Scientific ELITE System, failure analysis engineers can analyze the thermal signature from the package and pinpoint specific areas of interest for further investigation.
Thermal image, produced during ohmic short detection, showing wires soldered to a device
Nanoprobing
SEM and AFM based nanoprobing systems, such as the Thermo Scientific nProber IV System and the Thermo Scientific Hyperion Il System, are used for detecting defects at the transistor or BEOL wiring level. Nanoprobing provides high-confidence, precise localization of defects to enable detailed electrical characterization of individual transistors and to improve the success rate of physical failure analysis.
The nProber IV System provides electron beam probing for transistor-level fault localization
Imaging and analysis
TEM imaging and analysis of semiconductor devices
Acquiring atomic-resolution TEM data is essential for imaging and characterizing gate-all-around 3D structures, controlling critical dimensions, and conducting defect analysis. The Thermo Scientific Talos F200E (S)TEM and Thermo Scientific Spectra Ultra (S)TEM are specifically designed to meet the analytical requirements and characterization needs for the next generation of transistors and materials.
TEM imaging and analysis on SiGe interfaces by the Spectra Ultra (S)TEM
TEM metrology
As logic devices become more complex, the need for TEM metrology data is growing exponentially. For advanced logic manufacturers, fast access to TEM metrology is essential for acquiring "ground truth" reference data for process control and yield improvements. The Thermo Scientific Metrios 6 (S)TEM provides enhanced productivity and automation to ensure high-quality TEM data faster.
TEM imaging and metrology on gate-all-around structures using the Metrios 6 (S)TEM
SEM imaging and analysis
SEM imaging and analysis are essential for examining surface and electrical defects. When combined with FIB milling, these techniques found on the Helios 5 EXL Wafer DualBeam and Helios 6 HD FIB-SEM provide efficient and high-resolution data for analyzing complex gate-all-around features, such as BOEL interconnects to the power delivery network.
SEM imaging and analysis on advanced logic device cross section
Atom probe tomography sample preparation
Atom probe tomography enables atomic-resolution characterization of the sample structure and elemental composition. For gate-all-around devices, atom probe tomography is especially useful in the research and development phase of new transistor materials, as it provides 3D data not obtainable through other techniques. The Helios 5 FX DualBeam offers an optimized workflow for efficient sample preparation for atom probe tomography analysis.
Atom probe sample of a single gate on an advanced logic device, prepared using Atom Probe LX Software and the Helios 5 DualBeam
Electron channeling contrast imaging
Because defects such as threading dislocations and stacking faults can go unnoticed during X-ray inspection, ECCI is valuable in detecting crystalline defects in SiGe epitaxial layers. The Helios 5 FX DualBeam offers a comprehensive workflow for ECCI inspection, sample preparation, imaging, and analysis to accurately characterize crystalline defects.
100 nm SiGe fin with stacking faults imaged by ECCI technique
Semiconductor circuit editing
Circuit editing is the process of modifying or repairing integrated circuits (ICs) at the circuit level. Utilizing surgically precise FIB milling and chemistry deposition to correct design flaws, fix manufacturing defects, or implement design changes, the Thermo Scientific Centrios Circuit Edit Systems enable rapid prototyping to accelerate development time and avoid costly mask spins.
Centrios Systems offer superior contrast with a high signal-to-noise ratio, even at low-kV, revealing active areas of interest while minimizing damage
Electrostatic discharge
Electrostatic discharge can damage small features and structures in semiconductors and integrated circuits. The Thermo Scientific MK Test Systems and the Thermo Scientific Orion3 Electrostatic Discharge Testers were designed to verify that your devices meet targeted electrostatic discharge compliance standards.
SEM image showing ESD damage to a device gate oxide at 50,000× magnification; hole size is roughly 50 nm
For Research Use Only. Not for use in diagnostic procedures.